1. Field of the Invention
The present invention generally relates to an image distortion compensating apparatus that controls a convergence amplifier, and more particularly to an image distortion compensating apparatus which reduces phase delay and noise which occur during use of a D-class amplifier. The present invention is based on Korean Patent Application No. 2002-41370, which is incorporated herein by reference.
2. Description of the Related Art
Generally, an image display apparatus such as a projection television realizes one complete image through the process of focusing images of red, blue and green images projected on a cathode ray tube (CRT). In order to focus the red, blue and green images on one spot of the CRT, a predetermined degree of electric current is applied to convergence yoke coils attached to the CRT. That is, by the predetermined electric current as applied, the magnetic field of the convergence yoke coils vary to focus the images on the CRT in one spot, and this process is usually called a ‘convergence compensation’. For the purpose of convergence compensation, A-, B- and C-class analogue amplifiers are generally provided to amplify the pulse signal and drive the convergence yoke coils.
FIG. 1 is a view illustrating a conventional image distortion compensating apparatus.
As shown, the conventional image distortion compensating apparatus includes an image signal processor 11, a compensation value generator 12, an operational amplifier 13, a feedback resistor 14 and a convergence yoke 21 built in the CRT 20.
The image signal processor 11 processes an externally-received broadcasting signal, and outputs vertical and horizontal synchronization signals. The image signal processor 11 outputs the image signal to the CRT 20 and outputs the vertical and horizontal synchronization signals to the compensation value generator 12.
The compensation value generator 12 calculates a convergence compensation value based on the horizontal and vertical synchronization signals for convergence compensation of the image signal. That is, each horizontal synchronization signal of the CRT 20 screen is combined with a predetermined image distortion compensation value and an input voltage from the feedback resistor 14, and as a result, the convergence compensation value is outputted.
The operational amplifier 13 amplifies the convergence compensation value to a high-power signal. Generally, a convergence yoke coil 21a built in the convergence yoke 21 is driven by the high voltage high current to form a magnetic field, and the path of the electron beam changes due to the magnetic field as formed. Accordingly, there are mainly A-, B- and C-class amplifiers for linear-amplifying the voltage, and one of these is used as the operational amplifier 13. The feedback resistor 14 feeds back the voltage of the electric current flowing in the convergence yoke coil 21a toward the operational amplifier 13, thereby properly varying the amplitude of the operational amplifier 13. Meanwhile, a power transistor is used as an amplifier end for the A-, B- and C-class amplifiers for the purpose of amplifying electric current and voltage. Although the power transistor has fast response and small noise during feedback of the output voltage, by its nature as an electric-driven element, it has high turn-on resistance and power consumption. Usually, electric power efficiency of the power transistor is not more than 50%, so the rest of the power is converted into heat. This causes one disadvantage of the operational amplifier 13 including A-, B- and C-class amplifiers that a huge heat sink has to be prepared for the power consumption. Accordingly, volume and weight of the image display apparatus increases, and heat generated from the heat sink deteriorates safety of the system.
In order to resolve the above-mentioned problem of the prior art, the same applicant disclosed “image distortion compensating apparatus capable of compensating for a convergence distortion by using D-class amplifier” in Korean Patent Application No. 10-2002-0024207. In KR 10-2002-0024207, a D-class amplifier is adopted as an image distortion compensating apparatus which amplifies in response to a digital pulse signal. Because the D-class amplifier has 90% power efficiency, heat generation is greatly reduced. Accordingly, only a compact-sized heat sink is required, and the size of the image distortion compensating apparatus employing the D-class amplifier can subsequently have a reduced size, while it has increased power efficiency. However, there is one problem of the D-class amplifier. That is, because D-class amplifiers amplify based on the working principle that NMOS transistors are alternately turned on/off, the D-class amplifier requires a predetermined time interval before its output end reaches a predetermined level of electric potential from the time point when the NMOS transistors are turned on/off. This causes a switching delay, which subsequently lengthens a response time during controlling on the convergence yoke with the signals as delayed.
Referring to FIG. 2, the D-class amplifier will be described in detail.
The D-class amplifier consists of two NMOS transistors 31, 32 responding to pulses having a predetermined amplitude and duty ratio. The D-class amplifier performs switching operation by alternately turning on in response to two pulses of identical duty ratio and amplitude but opposite phases. Here, as described above, a predetermined time is required from the time point of alternate turn-on until the output voltage Vout reaches logic ‘high’ or logic ‘low’.
FIG. 3 is a waveform for illustrating the relation between the input and output waves of the D-class amplifier of FIG. 2.
As shown, the waveform lout of the output voltage from an output end Vout of the D-class amplifier in response to the input pulse CMD is delayed for a predetermined time period. At an “A”-zone, the input pulse CMD maintains a predetermined phase level, while the output voltage Iout of the D-class amplifier is in the transition to a predetermined electric level. Accordingly, the controlling on the convergence yoke coil 21a is delayed in accordance with the output delay of the D-class amplifier.